Version Found: v7.0
Version Resolved: See (Xilinx Answer 69038)
MIG UltraScale QDRII+ IP will fail to generate the IP if the "Memory Device Interface Speed (ps)" is incorrectly set above 450MHz (2222ps) for Burst Length 2 (BL2) designs.
The MIG GUI does not prevent the user from selecting faster speeds for BL2 QDRII+ SRAM memories than are supported which causes core generation to fail with the following messages:
This only affects MIG UltraScale QDRII+ BL2 designs.
To resolve the issue set the "Memory Device Interface Speed (ps)" to a supported frequency range (450MHz or slower).
05/07/2015 - Initial Release