Version Found: DDR3 v7.1
Version Resolved: (Xilinx Answer 69036)
Address Mirroring is not supported for DDR3 Dual Rank RDIMM parts.
However, upon IP generation, the CA_MIRROR parameter is enabled (set to ON) for these parts.
To work around this issue, the patch attached to this answer record must be installed to the Vivado 2015.1 install location.
Please download the patch and follow the patch installation instructions included within the AR64655_Vivado_2015_1_preliminary_rev1.zip\vivado\patch_readme\AR64655_Vivado_2015_1_preliminary_rev1.txt document.
The patch will disable the CA_MIRROR parameter for both RTL and simulation when a DDR3 dual rank RDIMM part is selected within the MIG tool.
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