AR# 64655


UltraScale DDR3 - Tactical Patch - IP generation incorrectly enables address mirroring for dual rank DDR3 RDIMMs


Version Found: DDR3 v7.1

Version Resolved: (Xilinx Answer 69036)

Address Mirroring is not supported for DDR3 Dual Rank RDIMM parts.

However, upon IP generation, the CA_MIRROR parameter is enabled (set to ON) for these parts.


To work around this issue, the patch attached to this answer record must be installed to the Vivado 2015.1 install location.

Please download the patch and follow the patch installation instructions included within the\vivado\patch_readme\AR64655_Vivado_2015_1_preliminary_rev1.txt document.

The patch will disable the CA_MIRROR parameter for both RTL and simulation when a DDR3 dual rank RDIMM part is selected within the MIG tool.


Associated Attachments

Name File Size File Type 1 MB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
69036 UltraScale/UltraScale+ DDR3 - Release Notes and Known Issues N/A N/A
AR# 64655
Date 01/12/2018
Status Active
Type Known Issues
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