AR# 64778

UltraScale/UltraScale+ Memory IP - When using the Auto Assign feature of Bank Planner, an error message is not issued when the memory ports do not fit into a half bank

Version Found: v7.0

Version Resolved: See (Xilinx Answer 58435)

I am using the Auto Assign Controllers option in the Bank Planner.

If a half bank with 2 bytes is selected for a controller, not all ports of the controller are placed and no error message is generated.

An error message similar to the following should be generated:

[u_my_mig] Could not auto place in the given bank(s): . At least 1 banks are required for auto placement with sufficient number of unassigned pins.

This issue will be resolved in a future release.

Until this time, you must manually assign the bytes within the banks and not use Auto Assign Controllers.

Revision History:

06/24/2015 - Initial Release

Was this Answer Record helpful?

Answer Number	Answer Title	Version Found	Version Resolved
58435	MIG UltraScale - IP Release Notes and Known Issues for Vivado 2014.1 and newer tool versions	N/A	N/A

AR# 64778
Date	01/12/2018
Status	Active
Type	Known Issues
Devices	Kintex UltraScale Virtex UltraScale Kintex UltraScale+ Virtex UltraScale+ More Less
Tools	Vivado Design Suite - 2015.3 Vivado Design Suite
IP	MIG UltraScale