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AR# 64829

AXI Bridge for PCI Express Gen3 (Vivado 2015.2) - AXI Master/Slave Outstanding Read/Write Transactions Limitation

Description

Version Found: v1.1 (Rev1)

Version Resolved and other Known Issues: See (Xilinx Answer 61898)

In Vivado 2015.2, the AXI Bridge for PCI Express Gen3 core configuration GUI has the 'AXI Master/Slave Outstanding Write/Read Transactions' option grayed out and fixed to '8'.

Solution

A value other than '8' is not supported.

The DMA/Bridge Subsystem for PCIe IP (for UltraScale+ devices, see (PG195)) allows the max outstanding transaction setting to be higher than 8 (up to 32).


Note: "Version Found" refers to the version where the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions. 


Revision History:

06/24/2015 - Initial Release

AR# 64829
Date 08/18/2017
Status Active
Type Known Issues
IP
  • AXI PCIe Gen3