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AR# 64838

Design Advisory for UltraScale FPGA Transceivers Wizard: GTH Production Updates in Vivado 2015.2

Description

This Design Advisory covers the updates made to the UltraScale FPGA Transceivers Wizard for UltraScale GTH production devices in Vivado 2015.2.  

Solution

Update #1: CPLL reset sequence in Vivado 2014.4.1 and 2015.1

Description: CPLLPD is used to reset the CPLL in UltraScale Transceivers.

In Vivado 2014.4.1 and 2015.1, the CPLLPD pulse generated by the Wizard reset sequence is too short in duration, and this can result in the CPLL not being reset.

This is fixed in the UltraScale Transceivers Wizard and the transceiver-based parent IPs in Vivado 2015.2.

In addition, this requirement will be documented in the UltraScale Architecture GTH Transceivers User Guide (UG576) v1.2 and the UltraScale Architecture GTY Transceivers User Guide (UG578) v1.1.

http://www.xilinx.com/support/documentation/user_guides/ug576-ultrascale-gth-transceivers.pdf
Impact: Customers using the following are required to update to 2015.2 Wizard/IPs:

  1. Impacted devices: GTH in Kintex UltraScale production devices, GTH in Virtex UltraScale ES2 devices, GTY in Virtex UltraScale ES1 and ES2 devices
  2. Impacted IPs: 2014.4.1 Wizard, 2015.1 Wizard and all IPs listed below

  • Aurora 8B/10B
  • Aurora 64B/66B
  • CPRI
  • DisplayPort
  • Gigabit Ethernet
  • GT Wizard
  • JESD204B
  • PCIe
  • QSGMII
  • SRIO Gen2
 
Customers using the following are not impacted:

GTH in Kintex UltraScale ES1 and ES2 devices and GTH in Virtex UltraScale ES1 devices are not impacted because they use the CPLL calibration block.



Update #2: QPLL temperature margin

Description: An update has been made to the wizard in Vivado 2015.2 to improve the QPLL temperature margin.

For example, to reset the QPLL at 0C and operate at 100C.

Impact: This affects the GT wizard and parent IPs as listed below that use GTH or GTY QPLL0 or QPLL1.

Any new designs using GTH or GTY QPLL0 or QPLL1 should use the Wizard/IPs in 2015.2.

Customers requiring enhanced temperature margin are recommended to update to Vivado 2015.2 Wizard/IPs.

  • 10G Ethernet PCS/PMA
  • AXI 10G Ethernet
  • 3G/HD-SDI
  • Aurora 64B/66B
  • CMAC
  • CPRI
  • Interlaken
  • RXAUI
  • XAUI



Update #3: QPLL attributes change for QPLL_FBDIV >=80

Description: An update has been made to the wizard in Vivado 2015.2 to improve the QPLL Output Jitter performance for configurations where QPLL_FBDIV >= 80.

Impact: This affects the GT wizard and parent IPs as listed below that use GTH QPLL0 or QPLL1 in Kintex/Virtex UltraScale devices in configurations in which the QPLL0_FBDIV or QPLL1_FBDIV in the GTHE3_COMMON is set to 80 or larger.

Any new designs in this configuration should use the Wizard/IPs in Vivado 2015.2.

This change is not required for existing designs.

  • 10G Ethernet PCS/PMA
  • AXI 10G Ethernet
  • 3G/HD-SDI
  • Aurora 64B/66B
  • CMAC
  • CPRI
  • Interlaken
  • RXAUI
  • XAUI

Revision History:

08/11/2015 - Added Virtex UltraScale to Update #3

07/30/2015 - Added UG578 to Update #1

07/06/2015 - Initial release

Linked Answer Records

Associated Answer Records

AR# 64838
Date Created 06/22/2015
Last Updated 08/12/2015
Status Active
Type Design Advisory
Devices
  • Kintex UltraScale
  • Virtex UltraScale