UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 65386

MIG 7 Series - When MEM_BITS changed in simulation model, FATAL error seen during simulation of MIG example design

Description

Version Found: MIG 7 Series v2.3 Rev2

Version Resolved: See (Xilinx Answer 54025)

The below error is seen with Vivado simulator when simulating a MIG example design (with a modified MEM_BITS parameter value of 26 in the ddr3_model_parameters.vh file) on a Red Hat Linux machine.

FATAL_ERROR: Vivado Simulator kernel has discovered an exceptional condition from which it cannot recover. Process will terminate. For technical support on this issue, please open a Web Case with this project attached at http://www.xilinx.com/support.

The same design hangs when run on a Windows 7 machine.

Solution

This is a known issue with Vivado Simulator.

Until this is fixed, QuestaSim can be used as a work-around.

Revision History

25/09/2015 - Initial Release

AR# 65386
Date Created 09/14/2015
Last Updated 10/19/2015
Status Active
Type Known Issues
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
Tools
  • Vivado Design Suite
IP
  • MIG 7 Series