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AR# 6539

Foundation Express 2.1i: "CONV: line X Wrong number of fields BUS" when creating HDL macro


Keywords: VHDL, Verilog, Express, HDL, macro, CONV

Urgency: Standard

General Description:
When synthesizing an HDL macro to be placed on a Foundation schematic, the following
error message may occur:

"CONV: line X Wrong number of fields BUS"

where X refers to an actual line number.


This may occur when a BUS has been declared as a port for this macro and then is
entirely unused in the HDL code. FPGA Express has trimmed the logic for the bus but
the declaration still exists in the XSF file (which is used to create the schematic symbol).

Open the <macro_name>.XSF file (located in the project directory) and examine the
line number refered to in the error to determine the bus signal that has been removed.
Remove this port declaration in your HDL source and re-synthesize.
AR# 6539
Date 03/12/2002
Status Archive
Type General Article