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AR# 65443

DMA Subsystem for PCI Express - Release Notes and Known Issues for Vivado 2015.3 and newer tool versions


This answer record contains the Release Notes and Known Issues for the DMA Subsystem for PCI Express Core and includes the following:

  • General Information
  • Known and Resolved Issues
  • Revision History

This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2015.3 and newer tool versions.


Supported devices can be found in the following three locations:

  • Open the Vivado tool -> IP Catalog, right-click on the IP and select Compatible Families.
  • For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado design tools.
  • PCIe DMA Subsystem Product Guide (PG195)

Changes in v3.0

  • Port Change 
    • Added debug ports. When the option 'Enable Debug Ports' is selected on the 'PCIe DMA' tab, all m_axis_rq/cc_* and s_axis_rc/cq_* signals will appear at the boundary
  • Bug Fix
    • Fixed issues with the example design generation for xcvu9p-flgc2104 and flga2577 packages
  • Feature Enhancement
    • Added support for PCIe Gen2 devices
    • Added shared logic support for 7 Series and UltraScale variants. Currently Shared logic is not supported when the Tandem feature is selected
    • Added "Check parity" to check parity on PCIe reads and add parity for PCIe writes.
    • Added "Parity propagate" to send and receive parity bits to/from the user
  • Other
    • Revision change in one or more subcores

Version Table

This table correlates the core version to the first Vivado design tools release version in which it was included.

Core VersionVivado Tools Version
v2.0 (Rev1)2016.2
v1.0 (Rev1)2015.4

Tactical Patch

The following table provides a list of tactical patches for the DMA Subsystem for PCI Express core applicable on corresponding Vivado tool versions.

Answer Record Core Version (After installing the Patch)Tool Version
(Xilinx Answer 66500)v1.0 (Rev. 66500)
(Xilinx Answer 67111)v2.0 (Rev. 67111)2016.1
(Xilinx Answer 67421)v2.0 (Rev. 67421)2016.2
(Xilinx Answer 68111)v3.0 (Rev. 68111)2016.3
(Xilinx Answer 68259)
v3.0 (Rev. 68259)2016.3

Known and Resolved Issues

The following table provides known issues for the DMA Subsystem for PCI Express core, starting with v1.0, initially released in Vivado 2015.3.

Note: The "Version Found" column lists the version the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Answer RecordTitleVersion FoundVersion Resolved
(Xilinx Answer 68259)FATAL_ERROR: Vivado Simulator kernel has discovered an exceptional condition from which it cannot recover. Process will terminate. v3.0Not Resolved Yet
(Xilinx Answer 68205)Gen3x8 on UltraScale -1, -1L, -1LV, -1H, -1HV devices and 250Mhz user clock support v3.0Not Resolved Yet
(Xilinx Answer 68111)Tactical Patch
v3.0Not Resolved Yet
(Xilinx Answer 67421) Prefetchable support for 64-bit BAR v2.0(Rev1)v3.0
(Xilinx Answer 66500)
IDLE STOP is not set correctly
(Xilinx Answer 67111)Issue with Legacy Interrupt Mode and MSI-X Table Offset v2.0v2.0(Rev1)

Other Information:

(Xilinx Answer 65444)Xilinx PCI Express DMA Drivers and Software Guide
(Xilinx Answer 68049)DMA Subsystem for PCI Express (Vivado 2016.3) - Performance Numbers

Revision History:

30/09/2015Initial Release
02/20/2016Added (Xilinx Answer 66500)
04/13/2016Updated for 2016.1 Release
06/06/2016Added (Xilinx Answer 67111)
08/06/2016Updated for 2016.2 Release
07/29/2016Added (Xilinx Answer 67421)
10/05/2016Updated for 2016.3 Release
10/30/2016Added (Xilinx Answer 68111)
11/16/2016Added (Xilinx Answer 68205)
11/23/2016Added (Xilinx Answer 68259)
AR# 65443
Date 11/30/2016
Status Active
Type Release Notes
  • DMA for PCI Express (PCIe) Subsystem