This answer record contains the Release Notes and Known Issues for the DisplayPort RX Subsystem and includes the following:
DisplayPort RX Subsystem Page:
https://www.xilinx.com/content/xilinx/en/products/intellectual-property/ef-di-displayport.html
General Information
Supported Devices can be found in the following three locations:
For a list of new features and added device support for all versions:
Version Table
This table correlates the core version to the first Vivado design tools release version in which it was included.
| Core Version | Vivado Tools Version | Subsystem Changelog | Subsystem Patches | Standalone Software Driver Patches |
|---|---|---|---|---|
| 2.1 (Rev. 2) | 2018.1 | (Xilinx Answer 70699) | ||
| 2.1 (Rev. 1) | 2017.4 | (Xilinx Answer 70386) | ||
| 2.1 | 2017.3 | (Xilinx Answer 69903) | ||
| v2.0 (Rev. 3) | 2017.1 | (Xilinx Answer 69055) | ||
| v2.0 (Rev. 2) | 2016.4 | (Xilinx Answer 68369) | (Xilinx Answer 68455) | (Xilinx Answer 68631) |
| v2.0 (Rev. 1) | 2016.3 | (Xilinx Answer 68021) | ||
| v2.0 | 2016.1 | (Xilinx Answer 66930) | ||
| v1.0 | 2015.4 | (Xilinx Answer 66004) |
General Guidance
The table below provides Answer Records for general guidance when using the DisplayPort RX Subsystem.
| Article Number | Article Title |
|---|---|
| (Xilinx Answer 70130) | Why does the video resolution not match between the GPU settings and the RX MSA registers? |
| (Xilinx Answer 69077) | XAPP1271 - Why does a debug build work but not the release build with optimizations? |
| (Xilinx Answer 68639) | Design Advisory for DisplayPort RX/TX Subsystems and LogiCORE Video PHY Controller - 7 Series GTHE2 and GTPE2 device support removed |
| (Xilinx Answer 68227) | Video Common Library - How do I add support for custom resolutions to the Video Timing Table? |
Known and Resolved Issues
The following table provides known issues for the DisplayPort RX Subsystem, starting with v1.0, initially released in Vivado 2015.4.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
IP
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 70538) | The AXI4-Stream interface is not following the specification for the data width | v2.1 | N/A |
| (Xilinx Answer 69421) | 7 Series: The CPLL must be powered down when not in use | v2.0 | N/A |
| (Xilinx Answer 69199) | Why is the OOC synthesis of the BD always Out of date? | v2.0 (Rev. 2) | v2.0 (Rev. 4) |
| (Xilinx Answer 68860) | Why do I get the warning message that the DisplayPort LogiCORE will become obsolete when I am already using the subsystem? | v2.0 (Rev. 4) | N/A |
| (Xilinx Answer 68908) | Why does training succeed but there is no video data captured when using HDCP? | v2.0 (Rev. 3) | v2.0 (Rev. 4) |
| (Xilinx Answer 68431) | How do I use the DP159 forwarded clock for 1.62 Gbps for the Kintex UltraScale parts? | v2.0 (Rev. 3) | v2.0 (Rev. 4) |
| (Xilinx Answer 68629) | How do I support 3 EDID blocks? or How do I support an EDID larger than 256 bytes? | v2.0 (Rev. 3) | v2.0 (Rev. 4) |
| (Xilinx Answer 68454) | Why does training time out when using a DisplayPort RX Subsystem MST design on some sources? | v2.0 (Rev. 3) | v2.0 (Rev. 4) |
| (Xilinx Answer 67433) | Why does the DisplayPort RX driver for the DisplayPort IP and DisplayPort subsystem sometimes fail to train when using the DP159 production silicon? | v2.0 (Rev. 1) | v2.0 (Rev. 3) |
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 67274) | Why does the CP_CURRENT (0x02) register value differ between the documentation and the driver? | v2.0 (Rev. 1) | N/A |
| 04/04/2018 | Added v2.1 (Rev. 2) to Version Table |
| 03/02/2018 | Added v2.1 (Rev.1) to Version Table, (Xilinx Answer 70130), (Xilinx Answer 68227), (Xilinx Answer 68639) and (Xilinx Answer 70538) |
| 11/13/2017 | Added v2.1 to Version Table |
| 08/21/2017 | Added (Xilinx Answer 69421) |
| 06/29/2017 | Added (Xilinx Answer 69199) |
| 05/12/2017 | Added v2.0 (Rev. 3) to Version Table (Xilinx Answer 68860) and (Xilinx Answer 69077) |
| 02/07/2017 | Added (Xilinx Answer 68454), (Xilinx Answer 68629), (Xilinx Answer 68431), v2.0 (Rev. 2) to Version Table |
| 07/14/2016 | Added (Xilinx Answer 67274), (Xilinx Answer 67433) and added v2.0 (Rev. 1) to Version Table |
| 04/06/2016 | Added v2.0 to Version Table |
| 11/24/2015 | Initial Release |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 56852 | Xilinx Multimedia, Video and Imaging Solution Center - Top Issues | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 59384 | DisplayPort TX Subsystem - Release Notes and Known Issues for Vivado 2015.4 and newer tool versions | N/A | N/A |
| 54522 | LogiCORE IP DisplayPort - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions | N/A | N/A |
| 57842 | LogiCORE Video PHY Controller - Release Notes and Known Issues for Vivado 2015.4 and newer tool versions | N/A | N/A |
| AR# 65447 | |
|---|---|
| Date | 04/24/2018 |
| Status | Active |
| Type | Release Notes |
| IP |
|