AR# 65464


Virtex UltraScale FPGA VCU108 Evaluation Kit - Interface Test Designs


I am attempting to exercise the interfaces on the Virtex UltraScale FPGA VCU108 Evaluation Kit.

What tests can be run to ensure that the interfaces are working correctly?


Virtex UltraScale FPGA VCU108 Evaluation Kit Documentation and Example Designs referenced below can be found on the VCU108 Support page.

Feature Test Design Notes  
-- Configuration Interfaces --      
Configuration Mode Switches VCU108 User Guide (UG1066) Table has valid settings.
Assuming configuration source is correctly programmed, this can test the mode pins.
Configuration USB JTAG port VCU108 BIT (XTP361) VCU108 Hardware Setup  
Configuration BPI Flash VCU108 BIT (XTP361) VCU108 Hardware Setup  
-- Board Feature Interfaces --      
Board PCIe Edge Connector VCU108 PCIe Example Design (XTP366)    
Board Oscillator (MHz, Differential) VCU108 BIT (XTP361) The default BIT examples use the socket clock  
Boards RJxx - Ethernet VCU108 BIT (XTP361)    
Board USB Serial UART VCU108 BIT (XTP361)    
Board I2C Interface VCU108 BIT (XTP361)    
Board FMC-HPC Connector XM105 User Guide (UG537) Page 29. This is the User Guide for the XM105 Mezzanine Debug Card.
This card has DS5, DS6, and DS7, which indicate good power to the board.
Debug strategies will vary depending on the specific mezzanine card being used.
  VCU108 BIT (XTP361) Board Interface Test uses FMC test card.  
-- User Specified Interfaces --      
User SMA CLK Connectors (Differential) None available. These are completely user-driven I/O.
A good test would be loop back or monitoring differential I/O on a scope.
User LEDs VCU108 BIT (XTP361)    
User DIP Switches VCU108 BIT (XTP361)    
User Pushbuttons VCU108 BIT (XTP361)    
User LCD Display VCU108 BIT (XTP361)

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Answer Number Answer Title Version Found Version Resolved
43748 Xilinx Boards and Kits - Debug Assistant N/A N/A
AR# 65464
Date 09/23/2015
Status Active
Type General Article
Boards & Kits
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