When an Operating Temperature of High is selected in the DDR Configuration tab of the Zynq-7000 configuration GUI, the refresh and other timing parameter derating will not occur if requested by the LPDDR2 DRAM device.
When choosing the High Operating temperature for LPDDR2, the only modification made is to double the rate of refreshes, which is the correct handling for DDR3/3L/2 DRAM.
However, LPDDR2 has a more sophisticated mechanism where the DRAM can request further derating from the memory controller.
The PS DDR controller does not query the DRAM MR4 configuration register for this status and so will not further derate the refresh and other timing parameters.
To work around this issue, the automatic query and derating logic can be manually enabled in the ps7_init.c/tcl files using the following three registers:
This issue does not affect DDR3/3L/2 DRAM.
This issue is currently planned to be fixed in Vivado 2016.1.
A fix to EDK XPS is not currently planned.
11/02/2015 - Initial Version