This Answer Record provides clarification on configuring the Video Timing Controller (VTC) in interlaced mode and its operation with the AXI4-Stream to Video Output Bridge (VID-OUT).
This Answer Record is only relevant when using the VTC detector to detect interlaced video timing, or generation of interlaced video timing when the field-id output signal is connected.
The VTC is capable of detecting and generating interlaced video timing.
The VTC detector now determines whether or not the incoming video timing is interlaced as follows:
A new source select bit has been added to the control register (offset 0x0000, bit 19) for interlaced mode source select.
The new source select bit is required to command the VTC to generate interlaced video based on either the detected interlaced mode or the programmed value in the generator encoding register (offset 0x0068, bit 6).
The driver will be updated to provide the ability to set interlaced mode source select through the XVtc_SetSource function call.
As a work-around for the time being, the interlaced source select can be set by writing to the VTC control register as follows:
When the VTC is used in conjunction with the VID-OUT Bridge it is important to note that the bridge requires that the field-id polarity is Low when the incoming video is progressive.
When the incoming video is interlaced, the bridge expects that the field-id signal is Low for the first field and High for the second field.
In both cases the VTC should be programmed such that the generator field-id polarity is Low.
The generator field-id polarity can be set using the XVtc_SetPolarity function call in the VTC driver.