This answer record contains the Release Notes and Known Issues for the HDMI 1.4/2.0 Transmitter (TX) Subsystem and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2015.4 and later versions.
HDMI 1.4/2.0 Transmitter (TX) Subsystem Page:
https://www.xilinx.com/products/intellectual-property/hdmi.html
Xilinx Forums:
Please seek technical support via the Video IP Board. The Xilinx Forums are a great resource for technical support.
The entire Xilinx Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.
General Information
Supported Devices can be found in the following three locations:
Hardware Demonstration Design
VCK190, VMK180, KC705, KCU105, ZC706, ZCU102, ZCU104, ZCU106, and VCU118 boards are supported by the HDMI IP example design.
Detailed instructions can be found in Chapter 6 of (PG235):HDMI 1.4/2.0 Transmitter Subsystem Product Guide
For a list of new features and added device support for all versions:
Change log of Subsystem or IP
Change log of Standalone Software Drivers
Linux Support
Version Table
This table correlates the core version to the first Vivado design tools release version in which it was included.
| Core Version | Vivado Tools Version | Subsystem Change log | Subsystem Patches | Standalone Software Driver Patches | Linux Driver Patches |
|---|---|---|---|---|---|
| v3.1 (Rev 6) | 2020.2 | (Xilinx Answer 75786) | |||
| v3.1 (Rev 4) | 2020.1 | (Xilinx Answer 73626) | (Xilinx Answer 75482) | ||
| v3.1 (Rev 3) | 2019.2 | (Xilinx Answer 72923) | (Xilinx Answer 73200) | ||
| v3.1 (Rev 2) | 2019.1 | (Xilinx Answer 72242) | (Xilinx Answer 72754) | (Xilinx Answer 73093) | |
| v3.1(Rev 1) | 2018.3 | (Xilinx Answer 71806) | |||
| v3.1 | 2018.2 | (Xilinx Answer 71212) | |||
| v3.1 | 2018.1 | (Xilinx Answer 70699) | |||
| v3.0 (Rev. 1) | 2017.4 | (Xilinx Answer 70386) | (Xilinx Answer 70380) | ||
| v3.0 | 2017.3 | (Xilinx Answer 69903) | (Xilinx Answer 69886) | (Xilinx Answer 70099) | |
| v2.0 (Rev. 5) | 2017.2 | (Xilinx Answer 69326) | (Xilinx Answer 69850) | (Xilinx Answer 70097) | |
| v2.0 (Rev. 4) | 2017.1 | (Xilinx Answer 69055) | |||
| v2.0 (Rev. 3) | 2016.4 | (Xilinx Answer 68369) | |||
| v2.0 (Rev. 2) | 2016.3 | (Xilinx Answer 68021) | |||
| v2.0 (Rev. 1) | 2016.2 | (Xilinx Answer 67345) | (Xilinx Answer 67927) | ||
| v2.0 | 2016.1 | (Xilinx Answer 66930) | |||
| v1.0 | 2015.4 | (Xilinx Answer 66004) | (Xilinx Answer 66535) | (Xilinx Answer 66534) |
General Guidance
The table below provides Answer Records for general guidance when using the HDMI Transmitter (TX) Subsystem.
| Article Number | Article Title |
|---|---|
| (Xilinx Answer 72812) | HDMI example design - Why do I hear audio glitches on the pass-through example design or TX example design with AOC monitors? |
| (Xilinx Answer 72555) | ZCU102, ZCU106 HDMI example design - No UART output with default example design flow if ZCU102 and ZCU106 boards have newer DIMMs |
| (Xilinx Answer 70515) | ZCU102, ZCU106 - HDMI Transmitter Subsystem - Why do I see a flickering image when connecting to some HDMI Sinks? |
| (Xilinx Answer 72332) | Opening HDMI v2019.1 TX Only Example design gives CRITICAL WARNING: [BD 41-1228] Width mismatch when connecting input pin |
| (Xilinx Answer 68780) | How do I send custom AVI InfoFrames? |
| (Xilinx Answer 70514) | Where can I find an HDMI Compliant Reference Schematic? |
| (Xilinx Answer 69821) | Why are some audio blocks and a HDCP block assigned to 512 Mb address spaces automatically? |
| (Xilinx Answer 67754) | Why do I see a stray pink line if there is no actual audio sending to the IP? |
| (Xilinx Answer 64562) | Why is the output always 12 bits per pixel in YUV 422 (YCrCb 4:2:2) mode? |
| (Xilinx Answer 69998) | Why might my downstream device have problems detecting that the correct output resolution is not being detected correctly? |
| (Xilinx Answer 68801) | Is there a way to force the downstream HDMI Sink to reset and re-establish a link similar to how the HDP can force the HDMI Source to retrain? |
| (Xilinx Answer 68526) | Where can I find an HDMI RX/TX Subsystem example designs? |
| (Xilinx Answer 68045) | Why do I get an error saying that the HDMI RX or TX Subsystem had failed to Initialize? |
| (Xilinx Answer 66849) | Why do I get a Critical Warning when connecting a YUV 4:2:2 AXI4-Stream input to the HDMI Receiver or Transmitter Subsystems? |
| (Xilinx Answer 66741) | Do I need to have both the HDCP 1.x and HDCP 2.2 cores or is HDCP 2.2 a superset of HDCP 1.x? |
Known and Resolved Issues
The following tables 3 and 4 provide known issues for the HDMI 1.4/2.0 Transmitter (TX) Subsystem, starting with v1.0, initially released in Vivado 2015.4.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Table 3: IP
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 76104) | Block design validation or regeneration fails when using Native Interface | v3.1 (Rev 6) | N/A |
| (Xilinx Answer 70238) | Can YUV 4:2:2 12-bit interlaced SD (480i60 and 576i50) resolutions be supported? | v2.0 (Rev. 3) | N/A |
| (Xilinx Answer 70100) | Why do I sometimes have problem transmitting HBR Audio? | v2.0 (Rev. 5) | v3.0 (Rev. 1) |
| (Xilinx Answer 68016) | Why do some video test patterns not generate outputs in the example design? | v2.0 (Rev. 2) | v2.0 (Rev. 4) |
| (Xilinx Answer 69427) | Why do I sometimes see DDC Transaction failures when the HDMI Sink requests clock stretching? | v2.0 (Rev. 5) | v3.0 |
| (Xilinx Answer 68395) | Why do I get a Critical Warning about an HDCP license even when I do not select HDCP as an option? | v2.0 (Rev. 3) | v2.0 (Rev. 4) |
| (Xilinx Answer 68317) | Why am I not able to see valid video when using 4096x2160 when the AXI4-Stream remapper functions are enabled? | v2.0 (Rev. 2) | v2.0 (Rev. 3) |
| (Xilinx Answer 67927) | Why do I sometimes see failures when performing HDCP Authentication? | v2.0 (Rev. 1) | v2.0 (Rev. 2) |
| (Xilinx Answer 67323) | Why is my DVI monitor having problems locking when receiving output from the HDMI Transmitter Subsystem? | v1.0 | v2.0 |
| (Xilinx Answer 66503) | Why does the HDMI Transmitter Subsystem in XAPP1275 v1.0 fail to meet timing at 297MHz when using a Hardware Evaluation License? | v1.0 | v2.0 |
| (Xilinx Answer 66380) | Why is the License type set to "Included" when a Purchased license is required to generate output products? | v1.0 | v2.0 |
| (Xilinx Answer 66290) | Why do I see problems with the Audio mapping in both 2 channel and 8 channel modes? | v1.0 | v2.0 |
Table 4: Software Driver
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 70890) | Video Common Library v4.3 - Why do I encounter SDK compilation error if the XVIDC_EDID_VERBOSITY definition is set to 2? | v3.1 | v3.1(Rev 1) |
| (Xilinx Answer 68799) | Why do some sinks have problems receiving 576i video from the HDMI TX Subsystem? | v3.0 | v3.1 |
| (Xilinx Answer 70379) | Why is the scrambler still enabled when switching from HDMI 2.0 resolutions (with TMDS clock >340 MHz) to HDMI 1.4 resolutions? | v3.0 (Rev. 1) | v3.1 |
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 75482) | HDMI DRM Framework - Why do some monitors not show the HDR ON label while playing HDR content? | v2020.1 | N/A |
Revision History:
| 02/05/2021 | Added (Xilinx Answer 76104) |
| 09/11/2020 | Added (Xilinx Answer 75482) |
| 09/25/2019 | Added (Xilinx Answer 72812) and (Xilinx Answer 72754) |
| 07/25/2019 | Added (Xilinx Answer 72555) |
| 05/27/2019 | Added (Xilinx Answer 70515) |
| 05/10/2019 | Added (Xilinx Answer 72332) |
| 10/31/2018 | Added (Xilinx Answer 70514) |
| 06/05/2018 | Added (Xilinx Answer 69821) |
| 05/10/2018 | Added (Xilinx Answer 67754) |
| 04/24/2018 | Added (Xilinx Answer 64562) |
| 04/11/2018 | Added v3.1 to Version Table and (Xilinx Answer 70890) and Hardware Demonstration Design information |
| 01/22/2018 | Added (Xilinx Answer 68799) |
| 01/04/2018 | Added (Xilinx Answer 70379) |
| 12/20/2017 | Added v3.0 (Rev. 1) to the Version Table and (Xilinx Answer 70238) |
| 10/30/2017 | Added (Xilinx Answer 70097), (Xilinx Answer 70099) and (Xilinx Answer 70100) |
| 10/16/2017 | Added v3.0 to the Version Table and (Xilinx Answer 69998), (Xilinx Answer 66534), (Xilinx Answer 66535), (Xilinx Answer 67927), (Xilinx Answer 67927), (Xilinx Answer 69886)and (Xilinx Answer 68016) |
| 08/18/2017 | Added (Xilinx Answer 68801) |
| 06/30/2017 | Added v2.0 (Rev. 5) to the Version Table |
| 06/01/2017 | Added v2.0 (Rev. 4) to the Version Table, and (Xilinx Answer 68780) |
| 01/13/2017 | Added (Xilinx Answer 68526) |
| 12/14/2016 | Added v2.0 (Rev. 3) to the Version Table, (Xilinx Answer 68317) and (Xilinx Answer 68395) |
| 10/05/2016 | Added v2.0 (Rev. 2) to the Version Table, and (Xilinx Answer 67927), and (Xilinx Answer 68045) |
| 06/08/2016 | Added v2.0 (Rev. 1) to the Version Table, and (Xilinx Answer 67323) |
| 04/06/2016 | Added v2.0 to the Version Table, and (Xilinx Answer 66849) |
| 03/01/2016 | Added (Xilinx Answer 66741) |
| 02/11/2016 | Added (Xilinx Answer 66615) |
| 01/28/2016 | Added (Xilinx Answer 66503) |
| 01/12/2016 | Added (Xilinx Answer 66380) |
| 12/18/2015 | Added (Xilinx Answer 66290) |
| 11/24/2015 | Initial Release |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 56851 | Xilinx Multimedia, Video and Imaging Solution Center | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 54546 | HDMI 1.4/2.0 Receiver (RX) Subsystem - Release Notes and Known Issues for the Vivado 2015.1 tool and later versions | N/A | N/A |
| 42166 | HDCP 1.x - Release Notes and Known Issues for the Vivado 2015.1 tool and later versions | N/A | N/A |
| AR# 65911 | |
|---|---|
| Date | 02/16/2021 |
| Status | Active |
| Type | Release Notes |
| IP | |