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AR# 65931

Vivado - [Opt 31-2] SRL16E is missing a connection on D pin.


When implementing a design with a number of MARK_DEBUG RTL attributes, opt_design fails with the following error:

[Opt 31-2] SRL16E u_ila_0/inst/ila_core_inst/shifted_data_in_reg[7][107]_srl8 is missing a connection on D pin.

How can this be avoided?


The error is due to a MARK_DEBUG net having no driver. 

During opt_design, the ILA logic is added and the net connecting to the D pin of the SRL is removed because it is not being driven. 

Following the SRL D pin is not possible after the error as the net has been removed. Also, the post-synthesis view will show the ILA as a black box. 

One way to avoid this error is to ensure that all MARK_DEBUG nets have drivers.

For designs with a large number of MARK_DEBUG nets, the ROUTE_STATUS property of nets can be used to find the nets with no loads. 

While these MARK_DEBUG nets have no loads, their loads will also be removed after opt_design. 

After the error, use the following command:

select_objects [get_nets -filter {MARK_DEBUG == TRUE && ROUTE_STATUS == NOLOADS}]

Then the RTL can be adjusted to make sure that the specific net is driven.

AR# 65931
Date 12/21/2015
Status Active
Type General Article
  • Vivado Design Suite - 2015.2
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