Version Found: DDR4 v1.0, DDR3 v1.0
Version Resolved: See (Xilinx Answer 69035) for DDR4 and (Xilinx Answer 69036) for DDR3
An UltraScale MIG example design which passes calibration successfully with the Vivado Synthesis and Implementation flow might error out in hardware manager with the Synplify PRO Black Box Testing flow provided in (PG150).
A message similar to the following can occur:
WARNING: [Xicom 50-46] One or more detected MIG version registers have empty values: MIG properties will not be built.
Parameter Map Version: 2, Error Map Version: 0, Calibration Map Version: 0, Warning Map Version: 0
Invalid calibration version register value detected from MIG core: 000.
This error occurs because the .bmm and .elf files required for calibration have not been associated.
(PG150) Chapter 6 includes a section titled "Synplify Pro Black Box Testing".
This section is missing required steps within this flow to associate the .elf and .bmm files.
Please insert the following steps between the existing steps 9 and 10:
10) Open the Synthesized Design.
11) Associate the .elf and .bmm files using Tcl commands similar to the following:
12) Use the following command:
refresh_design
The following INFO message should now be seen:
Generating merged BMM file for the design top 'ddr4_0_stub'...
INFO: [Memdata 28-144] Successfully populated the BRAM INIT strings from the following elf files: <ELF Path>/calibration_ddr.elf
refresh_design: Time (s): cpu = 00:01:13 ; elapsed = 00:00:57 . Memory (MB): peak = 8296.516 ; gain = 61.012 ; free physical = 684 ; free virtual = 103414
13) Run the implementation flow with the Vivado tool.
Note: If multiple instances of the same Memory IP are used in the same design the SCOPED_TO_CELLS constraint should include a list of each instance and use the absolute hierarchy to point to the cell rather than use the SCOPED_TO_REF constraint.
For example:
add_files /<location of *.elf file>/calibration_ddr.elf
add_files /<location of *.bmm file>/microblaze_mcs_ddr.bmm
set_property SCOPED_TO_CELLS {<inst0>/u_ddr_cal_riu/mcs0/microblaze_I <inst1>/u_ddr_cal_riu/mcs0/microblaze_I <inst2>/u_ddr_cal_riu/mcs0/microblaze_I <inst3>/u_ddr_cal_riu/mcs0/microblaze_I} [get_files calibration_ddr.elf]
set_property SCOPED_TO_CELLS {<inst0>/u_ddr_cal_riu/mcs0 <inst1>/u_ddr_cal_riu/mcs0 <inst2>/u_ddr_cal_riu/mcs0 <inst3>/u_ddr_cal_riu/mcs0} [get_files microblaze_mcs_ddr.bmm]
Revision History:
06/29/2016 | Updated to include multiple instances of the same Memory IP |
11/16/2015 | Initial Release |
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
69036 | UltraScale/UltraScale+ DDR3 - Release Notes and Known Issues | N/A | N/A |
69035 | UltraScale/UltraScale+ DDR4 - Release Notes and Known Issues | N/A | N/A |