UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 65981

Zynq UltraScale+ - HDIO in ES1 rev devices are unable to route to flip-flops not located in the IOB.

Description

In Vivado, when I try to route a design in an HDIO block on an ES1 ZU9EG device, the following warning can occur:

CRITICAL WARNING: [Route 35-54] Net: XXXXXO is not completely routed.

The tools seem unable to route both to an IOB Flip-flop and Fabric. 

What does this warning mean?

Solution

The HDIO block for the ES1 ZU9EG device lacks the ability to register in the IOB and route directly to fabric due to a device limitation. 

This limitation has been removed to accommodate design migration through a design change to the IOB. 

ES2 and newer versions of the ZU9EG do not have this limitation provided that the 2016.1 (or newer) software tools are leveraged.

This issue only impacts HDIO in the ES1 versions of the ZU9EG found in the Zynq UltraScale + family.

AR# 65981
Date Created 11/16/2015
Last Updated 11/30/2015
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC