This Answer Record should be used in conjunction with UG1192 "Xilinx Design Flow for Intel FPGA and SoC Users"
Follow the instructions below to convert an Altera .HEX file to a Xilinx .COE for RAM initialization:
Altera's memory initialization HEX file is a standard Intel HEX file which has the following format:
This example Altera HEX Initialization file is for a 36 bit x 1024 memory. Notice below that there are 1024 entries.
Use a text editor to column-select the DATA (green text), copy, and paste to a new file:
Now save this file as a COE file. Then perform another column select (last hex digit) and place a comma following:
Combine all hex values to a single line by line-joining all 1024 lines and remove the last floating comma.
Add the following lines to complete:
This now is the COE file that will be provided to Vivado IP Catalog to initialize the block RAM memory.
It would be relatively straightforward to create a Tcl script to perform the above steps.