UG1066 (v1.1) VCU108 Evaluation Board User Guide, Appendix C, outlines the following:
"Upon VCU108 board power-up, the onboard programmable clock sources generate their factory default frequencies. This happens until the system controller has booted and checked the onboard EEPROM to determine if a frequency value has previously been saved for either on-board clock source."
This is not working as expected.
When I follow the menu instructions in (UG1066) Appendix A to configure Si570 clock frequency, restoration is not happening as expected.
The clock frequency always defaults to 156.25MHz.
This functionality is not enabled on the VCU108. For an UltraScale board, you will need to to reprogram the clock settings each time at board power-up.
The SI570 clock frequency will always default to 156.25 MHz on board power-up.
(UG1066) will be updated to reflect this information.
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 62603 | Virtex UltraScale FPGA VCU108 Evaluation Kit - Known Issues and Release Notes Master Answer Record | N/A | N/A |
| AR# 66426 | |
|---|---|
| Date | 01/22/2016 |
| Status | Active |
| Type | General Article |
| Devices | |
| Boards & Kits | |