This example design sets up the TRACE port (routed via EMIO to the MICTOR connector on the board).
The IP Integrator diagram will look like the following screen capture:
The XDC constraints for the TRACE signals are attached.
You can export the hardware to SDK and build a simple BOOT.bin (FSBL + bitstream + hello_world).
IMPORTANT: Please see (Xilinx Answer 66436) XSDB is not able to connect to PSU after successfully booting in SD mode on ZCU102.
Once it has booted (for example from the SD card), the TRACE port is available on the MICTOR connector on the board for the third party debugger to use.
Zynq UltraScale+ MPSoC and Zynq-7000 do not use the following TRACE signals:
These signals can be left unconnected on the MICTOR or inside the PL.