This answer record contains the Release Notes and Known Issues for SMPTE ST 2059 and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2015.1 and later.
This core has been discontinued. Please see the Following PDN:
Note: This core will be removed from the Vivado IP catalog in Vivado 2017.2.
Supported Devices can be found in the following three locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.
This table correlates the core version to the first Vivado design tools release version in which it was included.
|Core Version||Vivado Tools Version|
|v1.0 (Rev. 2)||2017.1|
|v1.0 (Rev. 1)||2016.3|
The table below provides Answer Records for general guidance when using SMPTE ST 2059.
|Article Number||Article Title|
|(Xilinx Answer 68400)||What are the Clock Range and Specification requirement details for the RTC clock input of the SMPTE ST 2059 Core?|
Known and Resolved Issues:
The following table provides known issues for SMPTE ST 2059, starting with v1.0, initially released in Vivado 2016.1.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
|Article Number||Article Title||Version Found||Version Resolved|
Note: This core is discontinued and will be removed from the Vivado IP catalog in Vivado 2017.2.
|08/31/2018||Removed Product Page links|
|03/30/2018||Added (Xilinx Answer 68400)|
|04/05/2017||Added v1.0 (Rev. 1) and v1.0 (Rev. 2) to Version Table|