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AR# 66861

2016.1 SDK Zynq UltraScale+ MPSoC: When creating a boot image, the destination of the bitstream should be PL instead of A53.


When I try to generate the boot image by selecting the FSBL in project explorer, the Boot image dialog auto-populates the values and the bitstream is present with destination device = A53 instead of PL.

If I try to boot this created image and enable FSBL_DEBUG_DETAILED, the boot will fail while validating the partition load address.


Manually change the destination device for the bitstream to PL in the Create Boot Image GUI.

AR# 66861
Date 05/24/2016
Status Active
Type General Article
  • Zynq UltraScale+ MPSoC
  • Vivado Design Suite - 2016.1
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