AR# 66921


JESD204 - Achieving SYNC


This Answer Record includes information on achieving SYNC and SYNC dependencies.


For JESD204 systems, to achieve SYNC all lanes must have achieved code group sync (CGS).

Once CGS has been achieved, the SYNC pin can go high.

  • For Subclass 0, this will be immediately.
  • For Subclass 1, this will be on the next LMFC boundary (SYSREF must have been supplied to start the LMFC counter)
  • For Subclass 2, this will be on the next LMFC boundary (where end of reset started the LMFC counter)

To achieve CGS, a lane must see 0xBC (with charisk set) and there must be no errors (no not in table nor disparity errors).

Once CGS is achieved, the core stays in CGS unless 4 successive invalid octets are received (unexpected K-character, not in table error, or disparity error).

Achieving SYNC does not depend on any link parameters, other than line rate and active lanes.

Once in SYNC, there are 3 main reasons a system may fall out of sync (requesting a resync):

  1. CGS is lost, as described above, on any lane
  2. An incorrect transition from 0xBC to the start of ILA is detected
  3. Misalignment in the received data is detected. This means alignment codes in the data are detected at unexpected positions.
    A resync will be triggered when 8 successive multiframe alignment characters are detected in unexpected places (not at the end of a multiframe).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
69883 JESD204 Solution Center - Design Assistant - Link settings and initialization flow N/A N/A
AR# 66921
Date 10/06/2017
Status Active
Type General Article
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