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AR# 66950

DDR4 IP - Is it possible to fit a Dual Rank 16 bit interface into a single bank?

Description

Is it possible to fit a Dual Rank 16 bit interface into a single bank?

Solution

Yes, it is possible if the total pin count does not exceed 52 pins. To fit the interface into a single bank the following must be applied:

  • Must use DCI_CASCADE to free up VRP pin
  • Must use INTERNAL_VREF to free up VREF pin
  • Move all user interface signals to outside bank (i.e. sys_rst, sys_clk, init_complete_done etc.)
  • Move RESET_N to bank outside the memory interface bank
  • Place additional ADDR/CNTRL pins into Data Byte Lanes on the N1 and N12 I/O sites

A sample project is also attached for your reference.

Revision History:

04/05/2016 - Initial Release

Attachments

Associated Attachments

Name File Size File Type
ddr4_1_example_bank71.xpr.zip 11 MB ZIP
AR# 66950
Date Created 04/04/2016
Last Updated 04/18/2016
Status Active
Type General Article
Devices
  • Kintex UltraScale
  • Kintex UltraScale+
  • Virtex UltraScale
  • Virtex UltraScale+