CPRI auto-negotiation sometimes hangs on an UltraScale board, What can cause this problem?
In UltraScale transceivers, power down input is used to reset the CPLL. This must be at least 2us long.
If the stretching circuitry is not enabled by default, the transceiver will eventually stall during auto-negotiation.
This issue is seen in CPRI v8.4~v8.5 rev1. It will be fixed in CPRI v8.6 (Vivado 2016.1).
For UltraScale CPRI prior to v8.6, you must set the P_TX_PLL_TYPE to 2 manually.
For other known issues for the CPRI core, please refer to (Xilinx Answer 54473)