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AR# 67103

UltraScale Boards and Kits - VADJ behaviour and bring-up

Description

How is the VADJ rail treated on UltraScale Boards and Kits?

Solution

For UltraScale Boards and Kits, the process for VADJ read as defined in VITA57.1 FMC specification is followed.

This involves the querying of the Mezzanine Card's EPROM to ensure that the VADJ voltage is brought up at the correct voltage.


The Maxim Integrated power controllers on the UltraScale Boards and Kits power on with VADJ off by design.

VADJ gets enabled by the MSP430 System Controller after power-on under the following conditions (1 or 2 or 3):


  1. If no FMC cards are plugged into the UltraScale board FMC connectors

  2. If one FMC card is plugged into either of the 2 FMC connectors on the UltraScale board
    AND
    Proper IPMI format defined in VITA57.1 FMC specification is programmed into the Mezzanine Card's EPROM
    AND
    The Mezzanine Card's IPMI data defines a compatible VADJ voltage (range) with the UltraScale board's VADJ capability

  3. If two FMC cards are plugged into the two UltraScale board FMC connectors
    AND
    Proper IPMI format defined in the VITA57.1 FMC specification is programmed into both of the Mezzanine Card's EPROMs
    AND
    Both Mezzanine Card's IPMI data defines a VADJ voltage (range) compatible with the UltraScale board's VADJ capability

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
63175 Kintex UltraScale FPGA KCU105 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
62603 Virtex UltraScale FPGA VCU108 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
62604 Virtex UltraScale FPGA VCU110 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
66752 Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 67103
Date 05/20/2016
Status Active
Type General Article
Boards & Kits More Less