If you are upgrading a MIG IP generated using older Vivado versions (any version prior to 2016.2) and its maximum frequency is updated in Vivado 2016.2, errors similar to the following might be seen in the console:
This is due to the updates made to MIG v4.0.
Updates have been made to the frequency ranges for some configurations in the MIG IP in the 2016.2 release.
These were done to fully align with the datasheet and device supported speeds. We recommend following these guidelines for all new designs going forward.
If the above error occurs, create a new MIG IP from scratch in Vivado 2016.2, customize it as per your earlier IP settings and choose a new clock period within the allowed clock period range.
Designs requiring earlier clock periods should contact Xilinx Technical Support.