AR# 67180


Can SEM support clock frequencies lower than 8 MHz?


The SEM IP GUI for all supported families (6 Series, 7 Series, Zynq, UltraScale, UltraScale+) specifies a minimum clk frequency of 8 MHz.

Can a user run the SEM IP at a lower frequency than this?


The user-specified clock frequency impacts two things in the generated SEM IP:

  1. The example XDC/UCF timing constraints
  2. The V_ENABLETIME parameter that sets the UART baud rate in the example design.

If a user wants to use a frequency lower than 8 MHz, they can generate the IP targeting 8 MHz.

When doing so, please be aware of the following:

  • This frequency impacts the rate of error mitigation. Error detection and correction latency increases with lower clock frequency.
  • The example timing constraints will be over-constrained by default.
  • The generated V_ENABLETIME in the example UART module will need to be corrected. 

The customer should review the SEM IP Product Guide to understand how to calculate a new V_ENABLETIME for their desired clock frequency and baud rate, as well as to calculate the rounding error to determine if it is within tolerance. 

These equations are provided in the IP Product Guide.

AR# 67180
Date 05/09/2016
Status Active
Type General Article
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