UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 67188

Zynq UltraScale+ MPSoC - Can a mix of x16 and x8 devices be used for the PS DDR controller when using ECC?

Description

When using ECC, a 48-bit or 72-bit data width is required.

If 16-bit wide components are desired, can the last 8 bits be handled by a x8 device?

Solution

Component interfaces should be created with the same component for all components in the interface. 

x16 components have a different number of bank groups than the x8 components. 

For example, a 72-bit wide component interface should be created by using nine x8 components or five x16 components where half of one component is not used.

Four x16 components and one x8 component is not permissible.

AR# 67188
Date Created 05/09/2016
Last Updated 05/16/2016
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC