UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 67249

LogiCORE IP MIPI D-PHY Controller - What is the maximum value of start-up time before High-speed data transfer?

Description

LogiCORE IP MIPI D-PHY Controller - What is the maximum value of start-up time before High-speed data transfer?

Solution

The start-up time is governed by the min (LPX_TIME + HS_PREPARE_TIME + HS_ZERO_TIME) plus CDC flops delay and will vary with the line rate.

  • (a) LPX_TIME = Time of LP-01
  • (b) HS_PREPARE_TIME = Time of LP-00
  • (c) HS_ZERO_TIME = Time of HS-00

Note 1: The value of (a) can be set from the IP wizard. (the default is 50ns)

Note 2: The value of (b)+(c) is stated in the spec (145ns + 10UI) and no control is given to the user for these parameters.

AR# 67249
Date Created 05/18/2016
Last Updated 06/01/2016
Status Active
Type General Article
Devices
  • Virtex UltraScale+
  • Kintex UltraScale+
  • Zynq UltraScale+ MPSoC
IP
  • MIPI D-PHY Controller