The present MIPI core can be generated to support 1, 2, 3 or 4-lane configuration.
Are multi-lane use cases supported in MIPI D-PHY IP?
For example, if a D-PHY IP is generated for 4 lanes, can it also support 1, 2, 3, or 4y 4-lane modes?
The MIPI D-PHY Controller v2.0 does not support multi-lane use cases.
You must generate the D-PHY Controller with lane configuration specific to the use case.
If you generate a 4-lane MIPI D-PHY Controller, all 4 lanes should be enabled at same time. Failing to do so will put the IP in the wait state forever.