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AR# 67308

Boards and Kits - UltraScale and UltraScale+ MPSoC Evaluation Kits - VADJ and the System Controller


UltraScale and UltraScale+ MPSoC Evaluation Kits are fully compliant with the VITA 57.1 standard. This means that any FMC card that is used with these boards must have an EEPROM on board programmed according to the IPMI format defined in the VITA 57.1 FMC specification.

The IPMI specification notes that one should use a 2K EEPROM which is compatible with 24C02 devices. This EEPROM must be available to be queried at power on so that the appropriate VADJ voltage can be set on the carrier card.

If this specification is not followed, the VADJ voltage will not power up correctly (it will correctly remain at 0V). VADJ can be set manually through the FMC Menu of the System Controller on UltraScale and UltraScale+ MPSoC Kits.


UltraScale and UltraScale+ MPSoC Evaluation Kits adhere to the EEPROM IPMI format defined in the VITA 57.1 specification.

If a connected FMC card has a blank or corrupt EEPROM, the VADJ rail will not be enabled at power on. Evaluation Kits have the ability to override VADJ using the System Controller (system controller UART menu in early revisions of the boards, SCUI.exe in later revisions).

Extreme caution is advised when following these methods.

UltraScale, UltraScale+ and UltraScale+ MPSoC Evaluation Kits (rev D):

1) Connect to the System Controller through the USB UART interface on the Evaluation Kit (choose the Enhanced COM port, Baud rate 115200).

2) In the terminal program (for example, TeraTerm), under the 'Setup' tab, open 'Serial Port' and select: Baud Rate 115200, Data 8 bit, No Parity, Stop 1 bit and Flow Control None.  Click OK.

3) The System Controller Main Menu will appear in the terminal window.

4) Select '4. Adjust FPGA Mezzanine Card (FMC) Settings'

5) Select an option from 4 to 7 to set VADJ manually to the appropriate voltage level for your setup.

UltraScale, UltraScale+ and UltraScale+ MPSoC Evaluation Kits (rev 1.0 and beyond):

Newer revisions of UltraScale, UltraScale+ and UltraScale+ MPSoC Evaluation Kits use a different GUI to monitor voltages, clocks, EEPROM data, and system monitor.  

This is the System Controller GUI (SCUI.exe) and is available on the board product page for a particular kit.

When the SCUI.exe executable is launched, the current VADJ voltage can be checked in the Voltages tab:


If this VADJ_FMC voltage is not set to the value required for the current setup, this can be changed in the FMC tab of the SCUI.exe.

Go to the FMC tab, and select "Set VADJ".  

Here there is the choice to set the current VADJ_FMC voltage ("Current") whereby VADJ_FMC will return to the original VADJ_FMC upon power cycling, or set the VADJ_FMC voltage for boot-up ("Boot-up") which means that the VADJ_FMC voltage value set is retained after power cycling.

Choose the appropriate tab, then choose the appropriate voltage by clicking the button i.e. "Set VADJ to 1.5V" as shown below:


Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
63175 Kintex UltraScale FPGA KCU105 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 67308
Date 04/26/2017
Status Active
Type General Article
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