AR# 67349


JESD204B v7.0 - TX Lane ID is incorrect in ILA sequence, also resulting in possible Example Design simulation failure


In the Vivado 2016.1 and 2016.2 release of the JESD204B core [v7.0 and v7.0 (rev 1)], the lane ID in the ILA configuration data is incorrect. This affects the TX core only.

In implementation, it might be seen that the lane ID in the ILA configuration data is always tied to 0 for every lane, regardless of the user input.

In functional simulation, Xs might be seen, and the example design might not simulate correctly.


A patch is provided for Vivado 2016.1 and Vivado 2016.2 [JES204B v7.0 and v7.0 (rev 1)] which will fix the issue seen in the ILA configuration data.

Please see the Readme file included in the patch for details on how to install the patch.

This issue is resolved in Vivado 2016.3 [JESD204B v7.1].


Associated Attachments

AR# 67349
Date 07/20/2017
Status Active
Type Known Issues
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