Description

The Mictor Connector for TRACE support has 4 dedicated JTAG signals.

How should I connect them to a Zynq UltraScale MPSoC device?

Solution

The Mictor Connector for TRACE support has 4 dedicated JTAG signals:

• TRACE_TCK
• TRACE_TDO
• TRACE_TDI
• TRACE_TMS

Xilinx recommends connecting these signals to the PJTAG interface, which allows a third-party debugger to connect to the PS DAP through MIO signals.

See (UG1085) chapter 37 "System Test and Debug" for more details.

For example, you could decide to have the TRACE port routed via EMIO to PL pins (to save MIO pins) and have the TRACE_JTAG signals connected to PJTAG via MIO.

If the voltage is different between the TRACE and the TRACE_JTAG banks, you can provide the correct voltage to the dedicated VREF pins on the Mictor:

• Pin 12 VREF-TRACE (dedicated for TRACE)
• Pin 14 VREF-DEBUG (dedicated for TRACE_JTAG)

Note: Zynq UltraScale+ MPSoC and Zynq-7000 devices do not use the following TRACE signals:

• TRACEDBGRQ
• TRACEDBGACK
• TRACEEXTTRIG
• TRACETRST_B
• TRACESRST_B

These signals can be left unconnected on the MICTOR or inside the PL.