AR# 67365

LogiCORE IP MIPI D-PHY v2.0 - What is the expected behavior of the receiver IP on the SoT pattern and why do I not see an error when sending "BC" and receiving "B8"?

Description

What is the expected behavior of the receiver IP on the SoT pattern of the LogiCORE IP MIPI D-PHY v2.0?

 

(Please see also the specification: mipi_D-PHY_specification_v1-2.pdf (page22), available from https://mipi.org/, membership required.)

According to the specification, the SoT pattern transmitted by TX should be B8 0001_1101 and RX should recognize any pattern with 01_1101.


However, when "BC" or "B7" is transmitted from the transmitter as SoT, I am receiving "B8" but the MIPI D-PHY RX error flags stays low. (errsotsynchs=L, errsoths=L).

Why does this occur?


What conditions are needed in order to trigger the following error conditions?

  1. errsotsynchs="1"?
  2. errsoths="1"?

Solution

There is a known issue with the MIPI D-PHY v2.0 where that "BC" will not be detected as an error.

This issue has been resolved in the MIPI D-PHY v3.0 in Vivado 2016.3 and later.

The following conditions are required in order for the MIPI D-PHY to detect an error:

  • A 1-bit error will make errsoths="1"
  • A 2-bit error will make errsotsynchs="1"

"B7" will be detected without any errors.

However, data integrity errors will be observed at PPI.

The D-PHY Receiver will not do any data integrity checks as they are done at the CSI-2 protocol level.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
54550 LogiCORE IP MIPI D-PHY - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions N/A N/A
AR# 67365
Date 12/12/2019
Status Active
Type General Article
Devices
Tools
IP