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AR# 67565

Zynq UltraScale+ MPSOC ZCU102 Evaluation Kit - Can I use Bank 66 and Bank 67 on a ZCU102 board for MIPI_DPHY_DCI I/O ?


To use an HP I/O bank with the MIPI_DPHY_DCI I/O standard, the VRP of the I/O bank needs to be connected to ground via a 240 ohm resistor.

On the ZCU102 board, the VRP pin of Bank 66 and Bank 67 is NC. Is it possible to implement MIPI_DPHY_DCI I/O standard in Bank 66, Bank 67 of the ZCU102 board?


On the ZCU102 board, the VRP pin in Bank 66 & Bank 67 is not connected (NC). To use MIPI_DPHY_DCI on these banks, DCI Cascade must be used.

This requires the following command:

set_property DCI_CASCADE {slave_banks} [get_iobanks master_bank]

For example on the ZCU102 board, Bank 65 has a 240 ohm resistor connected to the VRP pin.

In this case, Bank 65 can be used as a DCI cascade master bank for Bank 66 and Bank 67.

set_property DCI_CASCADE {66 67} [get_iobanks 65]
AR# 67565
Date 08/02/2016
Status Active
Type General Article
  • Zynq UltraScale+ MPSoC
  • MIPI
  • MIPI D-PHY Controller
Boards & Kits
  • Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit
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