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AR# 67623

Zynq UltraScale+ MPSoC PS DDRC – AP Transaction error when accessing DDR4

Description

When I access Zynq UltraScale+ PS DDR4 via XSDB, I encounter the following error:

xsdb% mrd 0
AP transaction error, DAP status 30000021

Solution

In the Zynq UltraScale+ Processing System GUI, the PS DDR Burst Length is set to 16, however, the device only supports burst lengths of BL8 and BC4.

To work around this issue, change the burst length to 8, and DDR should work correctly.

AR# 67623
Date Created 08/01/2016
Last Updated 11/10/2016
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC
Tools
  • Vivado Design Suite - 2016.2