In Vivado 2016.1 some users have observed that some LVCMOS18 outputs do not drive high as expected.
If the design has been migrated from Vivado 2015.4 or earlier and the bitstream has been created in Vivado 2016.1, then LVCMOS18 outputs that previous worked might exhibit incorrect drive high behavior.
This problem occurs when the LVCMOS18 output is in a partially bonded out HR bank.
This only applies to LVCMOS18, LVCMOS25 and LVCMOS33 can drive high as expected.
For this problem to occur the following conditions need to be present:
The work-around is to set the below parameter before running write_bitstream:
set_param bitgen.EvalUnusedTiles true
This issue has been fixed in Vivado 2016.2.