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AR# 67776

SDK - Programming of FPGA fails on Zynq UltraScale+ MPSoC immediately after ‘rst -srst’ from XSDB


On my Zynq UltraScale+ MPSoC, I am trying to program the FPGA using the fpga command from XSDB immediately after 'rst -srst' command.

However, FPGA configuration fails with the error "fpga initialization failed".

How can I resolve this?


This occurs because Zynq UltraScale+ MPSoC needs TMS to be held high for 5 cycles of TCK.

The issue can be resolved by adding a delay after rst -srst'. During this delay, the debugger holds TMS high for 5 cycles, while polling the JTAG devices.

Example Usage:

rst -srst

after 100

fpga file.bit

AR# 67776
Date 09/12/2016
Status Active
Type Known Issues
  • Zynq UltraScale+ MPSoC
  • Vivado Design Suite - 2016.2
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