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AR# 67930

2016.2 PetaLinux Zynq UltraScale+ MPSoC GEM Clock Control needs to set for EMIO clock for RX

Description

This Answer Record covers how to update the GEM clock control register in the IOU SLCR to change GEM 0 and 1 to be EMIO clocked for RX.

Solution

The psu_init is not writing the correct value to that register to change it to the EMIO clock.

This needs to be set in xfsl_hooks as follows:

XFsbl_Out32(0xFF180308, XFsbl_In32(0xFF180308) | 0x21);

Replace the xfsbl_hooks.c file in {PROJECT_PATH}/components/bootloader/zynqmp_fsbl/ with the version attached to this Answer record.

This patch will update the GEM clock control register in the IOU SLCR to change GEM 0 and 1 to be EMIO clocked for RX.

Rebuild the PetaLinux project and package the BOOT.bin.

{PROJECT_PATH}$ petalinux-build
{PROJECT_PATH}$ petalinux-package --boot --format BIN --fsbl images/linux/zynqmp_fsbl.elf --fpga images/linux/zcu102_hpc0_qgige_wrapper.bit --u-boot images/linux/u-boot.elf --force

Attachments

Associated Attachments

Name File Size File Type
xfsbl_hooks.c 3 KB C
AR# 67930
Date Created 09/25/2016
Last Updated 10/19/2016
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC
Tools
  • PetaLinux - 2016.1
  • PetaLinux - 2016.2
IP
  • Ethernet 1000BASE-X PCS/PMA or SGMII
Boards & Kits
  • Zynq UltraScale+ MPSoC Boards and Kits