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AR# 67965

UltraScale+ - 100G Ethernet - Timing errors seen for some placements when GT RX Buffer bypass is used


Timing errors have been see for some UltraScale+ devices when the GT RX Buffer is bypassed.


1) For EVAL/ES1 devices MAX SKEW has a smaller requirement (0.910ns) versus the ES2 device for that same part (1.000ns).

Meeting timing cannot be guaranteed for these devices/packages.

2) For ES2 and production devices, the MAX SKEW requirement is 1.000ns. 

With this requirement failures have been seen in select devices:

  1. For xcvu11p and xcvu13p devices, timing failures are observed in Vivado 2016.3 and 2016.4. This is resolved in the 2017.1 release.
  2. For xcku11p and zu11eg devices with -1 speedgrade, timing failures are observed in the 2017.1 release and earlier.
    The speed files for these devices are still under development and these devices might exhibit max_skew violations between RX_SERDES_CLK[9:0] pins when using CAUI-10 buffer bypass.

Linked Answer Records

Master Answer Records

AR# 67965
Date 04/27/2017
Status Active
Type General Article
  • Virtex UltraScale+
  • Kintex UltraScale+
  • UltraScale - CMAC
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