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AR# 67973

XHMC IP - Timing failures might occur during implementation

Description

Version Found: XHMC IP v1.0

Version Resolved: See (Xilinx Answer 67969)

Timing failures can occur if the recommended HMC protocol datapath width is not used. Please refer to the HMC IP User Guide for more details.

It is recommended to use the following data path width (FLITs) in the IP GUI to ensure timing can be met in Vivado:





 

Solution

If timing still cannot be met due to routing congestion or high device utilization, you might need to use one of the following options:

  • Use a different timing closure strategy (for example, Explore)
  • Use the "-extraNetDelay_high" implementation option
  • Increase the datapath width further to ease timing closure.

Revision History:

10/05/2016 - Initial Release




Linked Answer Records

Master Answer Records

AR# 67973
Date Created 09/28/2016
Last Updated 10/18/2016
Status Active
Type Known Issues
Devices
  • Kintex UltraScale
  • Kintex UltraScale+
  • Virtex UltraScale
  • Virtex UltraScale+
IP
  • MIG UltraScale