AR# 67987

Zynq UltraScale+ MPSoC: 2016.3 FSBL and psu_init.tcl TCM ECC Initialization


This Xilinx Answer Record describes the TCM ECC Initialization done for Zynq UltraScale+ MPSoC in the 2016.3 versions of the FSBL or psu_init.tcl.


2016.3 FSBL:

  • for R5, TCM ECC is always initialized.
  • for A53, by default TCM ECC is not initialized as this also involves powering up the real-time processor unit (RPU).
    The TCM ECC Initialization can be performed by defining FSBL_A53_TCM_ECC_EXCLUDE_VAL as 0 in xfsbl_config.h.

2016.3 psu_init.tcl:

  • You will need to source fsbl.tcl (attached) and call XFsbl_TcmInit


Associated Attachments

Name File Size File Type
fsbl.tcl 19 KB TCL
AR# 67987
Date 10/27/2016
Status Active
Type General Article