We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 68085

XHMC IP - VCU110 board requires that "GT Insertion Loss at Nyquist" be equal to 4


Version Found: XHMC IP v1.0

Version Resolved: See (Xilinx Answer 67969)

In order for the XHMC IP Example Design to work reliably on the VCU110 board, the "GT Insertion Loss at Nyquist (dB)" must be set to 4. 

Using other values might result in hardware failures such as the failure to bring up the link.


This issue will be addressed in a future release of the XHMC IP.

Revision History:

10/17/2016 - Initial Release

Linked Answer Records

Master Answer Records

AR# 68085
Date 11/01/2016
Status Active
Type Known Issues
  • Virtex UltraScale
  • Virtex UltraScale+
  • XHMC
Boards & Kits
  • Virtex UltraScale FPGA VCU110 Development Kit
Page Bookmarked