When re-customizing a Test Pattern Generator instance in IP Integrator, if the maximum data width or the number of pixels per clock is changed, the byte width of the input interface is not updated.
Note that the width of tdata is set correctly, but the AXI-Stream interface width is not.
This causes critical warnings when validating a block design which uses the IP.
The optional port signals width gets updated correctly, but the metadata used to populate the GUI's port signals properties are not updated.
This causes a discrepancy in the GUI, but should not cause any functional issues.
This issue is fixed in Vivado 2018.3.