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AR# 68184

Zynq UltraScale+ MPSoC - PS LPDDR4 devices do not complete psu_init initialization

Description

When using an LPDDR4 device connected to the PS DDR controller, the debugger stops at psu_init or the FSBL boot stops without booting. 

How do I resolve this issue?

Solution

For ES1 devices, this can be resolved by adding the following configuration settings to the Zynq UltraScale+ MPSoC Processing System IP blocks Tcl parameter in the Block Properties->Properties tab:

CONFIG.PSU_DDRC_TRAIN_WRITE_LEVEL 0
CONFIG.PSU_DDRC_VREF 0

This issue is planned to be fixed starting in Vivado 2016.4.

AR# 68184
Date Created 11/04/2016
Last Updated 11/10/2016
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC
Tools
  • Vivado Design Suite - 2016.3
IP
  • Zynq UltraScale+ MPSoC Processing System