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AR# 68246

Zynq UltraScale+ MPSoC: 2016.3 xilfpga library (used by PMU firmware to implement the FPGA Manger framework in u-boot and Linux) is not resetting properly after downloading the bitstream.

Description

The current xilfpga library (used by the PMU firmware (PMUFW) to implement the FPGA Manger framework in u-boot and Linux) provided in the Xilinx 2016.3 release is not capable of handling the PS_PL_Powerup , ps_pl_isolation and ps_pl_reset.

After downloading the bitstream, if you try to access the PL region, the driver will hang.

For example the u-boot command "fpga loadb" will not load the bitstream properly.

Solution

To work around this issue, copy the attached files to the SDK installation path and re-build the PMUFW.

For example:

Copy the Tcl file to the below path:

\SDK\2016.3\data\embeddedsw\lib\bsp\standalone_v6_0\data

Copy the .c and .h file to the below path:

\SDK\2016.3\data\embeddedsw\lib\sw_services\xilfpga_v1_0\src

This issue is planned to be fixed in the 2016.4 release.

Attachments

Associated Attachments

Name File Size File Type
ar68246_112916.zip 14 KB ZIP
AR# 68246
Date Created 11/18/2016
Last Updated 12/01/2016
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC
Tools
  • Vivado Design Suite - 2016.3