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AR# 68272

Zynq UltraScale+ MPSoC System Monitor - Why does PS system monitor show all 0s on VCC_PSINTFP and VCC_PSDDR?


When I try to read the PS System Monitor, I see that the VCC_PSINTFP and VCC_PSDDR return all 0s. This also happens on GTR power supplies.


This occurs because only certain power rails are monitored in default sequence mode.

VCC_PSINTFP, VCC_PSDDR, and GTR power supplies are not placed on the sequencer by default.

You will need to manually place the unmonitored power rails on the sequencer.

Refer to (UG1085) for the steps to initialize the system monitor in the PS.

AR# 68272
Date 11/24/2016
Status Active
Type General Article
  • Zynq UltraScale+ MPSoC
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