2. Support
  3. AR# 6861: V2.1i COREGEN USER GUIDE, MTI, VHDL flow: 'Error xxxmyadder8.vhd(20): near "myadder8_top" expecting COMPONENT' in VHDL testbench example
  4. AR# 68615: Design Advisory for Zynq UltraScale+ MPSoC: Boot from NAND might fail if there is data corruption in the first parameter page.

AR# 68615

Design Advisory for Zynq UltraScale+ MPSoC: Boot from NAND might fail if there is data corruption in the first parameter page.

Description

When NAND is used as primary boot device and there is data or CRC corruption in the first parameter page, CSU Boot ROM (CBR) fails to boot from the NAND device.

Solution

Impact: Major

Work-arounds:

  1. Use NAND devices from vendors who tested for an error-free first parameter page. Contact NAND vendors for more details.
  2. Boot from other boot modes (eMMC) and use NAND as a secondary Boot device.

See (Xilinx Answer 68750) for a summary of errata workarounds.

Configuration Affected: NAND Booting.

Device Revisions Affected: All Zynq UltraScale+ MPSoCs.

AR# 68615
Date 04/12/2017
Status Active
Type Design Advisory
Devices