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AR# 68940

Soft Error Mitigation (SEM) IP – UltraScale+ Architecture SSI devices do not assert all of the status_* signals during halt condition (HLT)


When a halt (HLT) condition occurs in UltraScale+ family SSI devices, the Soft Error Mitigation (SEM) IP does not assert all of the status_* signals HIGH.

The following signals remain LOW:

  • status_diagnostic_scan
  • status_detect_only


The issue is that two signals are not driven high as specified.

As a work-around, monitoring the other five status signals for simultaneous assertion will indicate a HLT condition, and it can be reliably detected.

This will be addressed in the next release.

AR# 68940
Date 04/19/2017
Status Active
Type General Article
  • Virtex UltraScale+
  • Vivado Design Suite - 2017.1
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