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AR# 69155

UltraScale+ PCI Express Integrated Block (Vivado 2017.1) - Gen3x16 support for -2L devices.

Description

Version Found: v1.2(Vivado 2017.1)

Version Resolved and other Known Issues: (Xilinx Answer 65751)
The tactical patch provided with this answer record addresses issues related to Gen3x16 support for -2L devices.


This article is part of the PCI Express Solution Centre
(Xilinx Answer 34536)  Xilinx Solution Center for PCI Express

Solution

This is a known issue which is due to be fixed in a future release of the core.

Please install the tactical patch attached as described below:

INSTALLATION:

METHOD 1:

  1. Navigate to the $XILINX_VIVADO/patches directory (create this directory if it does not exist)
  2. Extract the contents of the ".zip" archive to a directory starting with the name AR69155
    Note: most extraction tools will allow you to automatically create a directory with the same name as the zip file
  3. Run Vivado software tools from the original install location.


METHOD 2:

  1. Create a separate directory for the patched files
  2. Extract the contents of the ".zip" archive to the desired patch directory location
  3. Set the MYVIVADO environment variable to point to the Vivado directory under this patch directory
    For example:
    set MYVIVADO=C:\MYVIVADO\vivado-patch-AR69155\vivado\
  4. Run Vivado software tools from the original install location.

For further information on finding the Xilinx install and using environment variable, see (Xilinx Answer 11630).

For further information on using the MYVIVADO environment variable, see (Xilinx Answer 53821).

Note: You might need to have a system administrator install the Patch if you do not have write permissions to the location where you plan to install the patch


Revision History:

7/25/2017 - Initial Release

Note: The "Version Found" column lists the version the problem was first discovered. 

The problem also exists in earlier versions, but no specific testing has been performed to verify earlier versions.

Attachments

Associated Attachments

Name File Size File Type
AR69155_Vivado_2017_1_preliminary_rev1.zip 1 MB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34536 Xilinx Solution Center for PCI Express N/A N/A
65751 UltraScale+ PCI Express Integrated Block - Release Notes and Known Issue N/A N/A
AR# 69155
Date 07/26/2017
Status Active
Type Known Issues
Devices
  • Kintex UltraScale+
  • Virtex UltraScale+
IP
  • UltraScale+ FPGA Integrated Endpoint Block for PCI Express
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